The present invention relates to a semiconductor device and a manufacturing method for the semiconductor device and is preferably utilizable to a semiconductor device having, for example, a super-junction structure.
The super-junction structure is used in a power semiconductor device as a structure that p-n junctions are periodically arranged thereby to obtain a low conduction resistance and a high junction withstand voltage. As patent documents which disclose such semiconductor devices, there are, for example, Japanese Unexamined Patent Application Publication No. 2002-164540, Japanese Unexamined Patent Application Publication No. 2003-309261, Japanese Unexamined Patent Application Publication No. 2005-228806, Japanese Unexamined Patent Application Publication No. 2005-303253 and Japanese Unexamined Patent Application Publication No. 2014-154596.
In the semiconductor device of the above-mentioned type, a comparatively deep trench is formed in an element formation region in which a semiconductor element is arranged and an insulating film and so forth are formed in the trench by, for example, a CVD (Chemical Vaper Deposition) method. An aspect ratio of the deep trench (a depth of the trench/a width of the trench) is set to at least about 7.